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rt7272a ? ds7272a-01 january 2013 www.richtek.com 1 copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. 3a, 36v, 500khz synchronous step-down converter general description the rt7272a is a high efficiency, current mode synchronous step-down dc/dc converter that can deliver up to 3a output current over a wide input voltage range from 4.5v to 36v. the device integrates a 150m high side and a 80m low side mosfet to achieve high conversion efficiency up to 95%. the current mode control architecture supports fast transient response and simple compensation circuit. a cycle-by-cycle current limit function provides protection against shorted output and an internal soft-start eliminates input current surge during start-up. the rt7272a provides complete protection functions such as input under voltage lockout, output under voltage protection, over current protection and thermal shutdown. the rt7272a is available in the thermal enhanced sop-8 (exposed pad) package. features z z z z z 4.5v to 36v input voltage range z z z z z 3a output current z z z z z internal n-mosfets z z z z z current mode control z z z z z fixed frequency operation : 500khz z z z z z adjustable output voltage from 0.8v to 30v z z z z z high efficiency up to 95% z z z z z stable with low esr ceramic output capacitors z z z z z cycle-by-cycle current limit z z z z z input under voltage lockout z z z z z output under voltage protection z z z z z thermal shutdown protection z z z z z adjustable current limit z z z z z rohs compliant and halogen free applications z distributed power systems z pre-regulator for linear regulators z notebook computers z point of load regulator in distributed power system z digital set-top boxes z personal digital recorders z broadband communications z flat panel tvs and monitors z vehicle electronics simplified application circuit package type sp : sop-8 (exposed pad-option 2) rt7272a lead plating system g : green (halogen free and pb free) vin gnd boot fb sw l r1 r2 v out v in rt7272a rlim r l comp c c r c c b c in c out
rt7272a 2 ds7272a-01 january 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? functional pin description function block diagram pin configurations (top view) sop-8 (exposed pad) marking information sw boot en gnd vin rlim fb comp gnd 2 3 4 5 6 7 8 9 rt7272a gspymdnn rt7272agsp : product number ymdnn : date code pin no. pin name pin function 1 sw switch node connect to external l-c filter. 2 boot bootstrap supply for high side gate drive. a 100nf or greater capacitor is recommended to connect from boot pin to sw pin. 3 en enable control input. a logic-high enables the converter; a logic-low forces the device into shutdown mode. 4, 9 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum thermal dissipation. 5 fb feedback input. this pin is connected to the converter output. it is used to set the output of the converter to regulate to the desired value via an resistive divider. 6 comp compensation node. comp is used to compensate the regulation control loop. connect a series rc network from comp to gnd. in some cases, an additional capacitor from comp to gnd is required. 7 rlim current limit setting. connect to a resistor to determine current limit. 8 vin power input. the input voltage range is from 4.5v to 36v. must bypass with a suitable large ceramic capacitor. v a + - + - + - uv comparator oscillator foldback control 0.4v internal regulator + - 1.7v shutdown comparator current sense amplifier boot vin gnd sw fb en comp v a v cc slope comp current comparator + - ea 0.8v s r q q rlim + - 1.2v lockout comparator v cc + 80m 150m r sense 5k uv ss v cc
rt7272a 3 ds7272a-01 january 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? operation the rt7272a is a constant frequency, current mode synchronous step-down converter. in normal operation, the high side n-mosfet is turned on when the s-r latch is set by the oscillator and is turned off when the current comparator resets the s-r latch. while the high side n-mosfet is turned off, the low side n-mosfet is turned on to conduct the inductor current until next cycle begins. error amplifier the error amplifier adjusts its output voltage by comparing the feedback signal (v fb ) with the internal 0.8v reference. when the load current increases, it causes a drop in the feedback voltage relative to the reference. the error amplifier's output voltage then rises to allow higher inductor current to match the load current. oscillator the internal oscillator runs at fixed frequency 500khz. in short circuit condition, the frequency is reduced to 75khz for low power consumption. internal regulator the regulator provides low voltage power to supply the internal control circuits and the bootstrap power for high side gate driver. enable the converter is turned on when the en pin is higher than 2v. when the en pin is lower than 0.4v, the converter will enter shutdown mode and reduce the supply current to 0.5 a. soft-start (ss) an internal current source charges an internal capacitor to build a soft-start ramp voltage. the fb voltage will track the internal ramp voltage during soft-start interval. the typical soft-start time is 2ms. current setting the current limit of high side mosfet is adjustable by an external resistor connected to the rlim pin. the current limit range is from 2a to 6a. when the inductor current reaches the current limit threshold, the comp voltage will be clamped to limit the inductor current. uv comparator if the feedback voltage (v fb ) is lower than 0.4v, the uv comparator will go high to turn off the high side mosfet. the output under voltage protection is designed to operate in hiccup mode. when the uv condition is removed, the converter will resume switching. thermal shutdown the over temperature protection function will shut down the switching operation when the junction temperature exceeds 150 c. once the junction temperature cools down by approximately 20 c, the converter will automatically resume switching.
rt7272a 4 ds7272a-01 january 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? electrical characteristics (v in = 12v, c in = 20 f, t a = 25 c, unless otherwise specified) absolute maximum ratings (note 1) z supply input v oltage, vin ----------------------------------------------------------------------------------------- ? 0.3v to 40v z switch voltage, sw ------------------------------------------------------------------------------------------------ ? 0.3v to (v in + 0.3v) z v boot ? v sw ---------------------------------------------------------------------------------------------------------- ? 0.3v to 6v z other pins voltage -------------------------------------------------------------------------------------------------- ? 0.3v to 40v z power dissipation, p d @ t a = 25 c sop-8 (exposed pad) --------------------------------------------------------------------------------------------- 2.041w z package thermal resistance (note 2) sop-8 (exposed pad), ja ---------------------------------------------------------------------------------------- 49 c/w sop-8 (exposed pad), jc --------------------------------------------------------------------------------------- 15 c/w z lead temperature (soldering, 10 sec.) ------------------------------------ ------------------------------------- 260 c z junction temperature ----------------------------------------------------------------------------------------------- 150 c z storage temperature range -------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body model) ---------------------------------------------------------------------------------------- 2kv recommended operating conditions (note 4) z supply input voltage, vin ----------------------------------------------------------------------------------------- 4.5v to 36v z junction temperature range -------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range -------------------------------------------------------------------------------------- ? 40 c to 85 c parameter symbol test conditions min typ max unit shutdown supply current v en = 0v -- 0.5 3 a quiescent current i q v en = 3v, v fb = 0.9v -- 0.9 1.2 ma feedback reference voltage v ref 4.5v v in 36v 0.788 0.8 0.812 v high side switch on-resistance r ds(on)1 -- 150 -- m low side switch on-resistance r ds(on)2 -- 80 -- m high side switch leakage current v en = 0v, v sw = 0v -- 0 10 a upper switch current limit range u oc 2 -- 6.3 a min. duty cycle, r lim = 57.6k 1.9 2.5 3.1 min. duty cycle, r lim = 84.5k 2.7 3.5 4.2 upper switch current limit u oc (note 5) min. duty cycle, r lim = 137k 4.5 5.5 6.5 a lower switch current limit from drain to source -- 1.5 -- a
rt7272a 5 ds7272a-01 january 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? parameter symbol test conditions min typ max unit oscillation frequency f osc1 450 500 550 khz short circuit oscillation frequency f osc2 v fb = 0v -- 75 -- khz maximum duty cycle d max v fb = 0.7v -- 90 -- % minimum on-time t on -- 100 -- ns logic-high v ih 2 -- -- en input voltage logic-low v il -- -- 0.4 v input under voltage lockout threshold v uvlo v in rising 3.9 4.1 4.3 v input under voltage lockout hysteresis v uvlo -- 250 -- mv thermal shutdown t sd -- 150 -- c thermal shutdown hysteresis t sd -- 20 -- c comp to current sense transconductance g cs i comp = 10 a -- 4.7 -- a/v error amplifier transconductance g ea -- 1000 -- a/v note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured at t a = 25 c on a high effective thermal conductivity four-layer test board per jedec 51-7. jc is measured at the exposed pad of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. note 5. r lim (k ) = [u oc x 24.14 x (1 + 0.024 x (u oc ? 3.5)) ? 1.3], where u oc is desired upper switch peak current limit value.
rt7272a 6 ds7272a-01 january 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? typical application circuit vin en gnd boot fb sw 3 5 8 1 2 l 100nf r1 r2 v out 10f x 2 v in 4.5v to 36v rt7272a rlim 7 r l comp c c r c 6 4, 9 (exposed pad) c b c in 179k c out enable rlim table 1. suggested component values v out (v) r1 (k ) r2 (k ) r c (k ) l ( h) c c (nf) c out ( f) 12 47 3.35 47 10 2.7 22 x 2 8 27 3 36 8.2 2.7 22 x 2 5 62 11.8 24 6.8 2.7 22 x 2 3.3 75 24 16 4.7 2.7 22 x 2 2.5 25.5 12 12 3.6 2.7 22 x 2 1.2 30 60 6.8 2.2 2.7 22 x 2
rt7272a 7 ds7272a-01 january 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? reference voltage vs. input voltage 0.790 0.793 0.795 0.798 0.800 0.803 0.805 0.808 0.810 2 6.75 11.5 16.25 21 25.75 30.5 35.25 40 input voltage (v) reference voltage (v) typical operating characteristics output voltage vs. output current 3.290 3.295 3.300 3.305 3.310 3.315 3.320 00.511.522.53 output current (a) output voltage (v) v in = 12v v in = 24v v in = 30v v out = 3.3v v in = 4.5v to 36v, i out = 0a efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 output current (a) efficiency (%) v out = 3.3v v in = 4.5v v in = 12v v in = 24v v in = 36v reference voltage vs. temperature 0.790 0.795 0.800 0.805 0.810 -50 -25 0 25 50 75 100 125 temperature (c) reference voltage (v) v in = 4.5v v in = 12v v in = 24v v in = 36v v out = 3.3v, i out = 0a switching frequency vs. temperature 440 450 460 470 480 490 500 -50 -25 0 25 50 75 100 125 temperature (c) switching frequency (khz) 1 v out = 3.3v, i out = 0a v in = 36v v in = 24v v in = 12v v in = 4.5v switching frequency vs. input voltage 450 460 470 480 490 500 4 8 12 16 20 24 28 32 36 input voltage (v) switching frequency (khz) 1 v out = 3.3v, i out = 0a
rt7272a 8 ds7272a-01 january 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? time (2.5ms/div) power on from en v out (2v/div) v en (5v/div) i out (2a/div) v in = 12v, v out = 3.3v, i out = 3a time (2.5ms/div) power off from en v out (2v/div) v in (5v/div) i out (2a/div) v in = 12v, v out = 3.3v, i out = 3a time (100 s/div) load transient response v out (200mv/div) i out (2a/div) v in = 12v, v out = 3.3v, i out = 0 to 3a time (1 s/div) switching v out (5mv/div) v sw (5v/div) i l (2a/div) v in = 12v, v out = 3.3v, i out = 3a time (100 s/div) load transient response v out (200mv/div) i out (2a/div) v in = 12v, v out = 3.3v, i out = 1.5a to 3a current limit vs. temperature 2 3 4 5 6 7 8 -50 -25 0 25 50 75 100 125 temperature (c) current limit (a) v in = 12v
rt7272a 9 ds7272a-01 january 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? application information output voltage setting the resistive divider allows the fb pin to sense the output voltage as shown in figure 1. figure 1. output voltage setting the output voltage is set by an external resistive voltage divider according to the following equation : out ref r1 v = v 1 r2 ?? + ?? ?? where v ref is the reference voltage (0.8v typ.). external bootstrap diode connect a 0.1 f low esr ceramic capacitor between the boot and sw pins. this capacitor provides the gate driver voltage for the high side mosfet. it is recommended to add an external bootstrap diode between an external 5v and boot pin for efficiency improvement when input voltage is lower than 5.5v or duty ratio is higher than 65% .the bootstrap diode can be a low cost one such as in4148 or bat54. the external 5v can be a 5v fixed input from system or a 5v output of the rt7272a. note that the external boot voltage must be lower than 5.5v figure 2. external bootstrap diode chip enable operation the en pin is the chip enable input. pulling the en pin low (<0.4v) will shutdown the device. during shutdown mode, the rt7272a quiescent current drops to lower than 3 a. driving the en pin high (>2.5v, < 18v) will turn on the device again. for external timing control, the en pin can also be externally pulled high by adding a r en resistor and c en capacitor from the vin pin (see figure 3). an external mosfet can be added to implement digital control on the en pin when no system voltage above 2.5v is available, as shown in figure 4. in this case, a 100k pull-up resistor, r en , is connected between v in and the en pin. mosfet q1 will be under logic control to pull down the en pin. figure 3. enable timing control figure 4. digital enable control circuit rt7272a gnd fb r1 r2 v out sw boot 5v rt7272a 100nf rt7272a en gnd v in r en c en en rt7272a en gnd 100k v in r en q1 en under voltage protection hiccup mode the rt7272a provides hiccup mode under voltage protection (uvp). when the v fb voltage drops below 0.4v, the uvp function will be triggered to shut down switching operation. if the uvp condition remains for a period, the rt7272a will retry automatically. when the uvp condition is removed, the converter will resume operation. the uvp is disabled during soft-start period.
rt7272a 10 ds7272a-01 january 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? out out l in vv i = 1 fl v ??? ? ?? ??? ? ??? ? having a lower ripple current reduces not only the esr losses in the output capacitors but also the output voltage ripple. high frequency with small ripple current can achieve the highest efficiency operation. however, it requires a large inductor to achieve this goal. for the ripple current selection, the val ue of i l = 0.24(i max ) will be a reasonable starting point. the large st ripple current occurs at the highest v in . to guarantee that the ripple current stays below the specified maximum, the inductor value should be chosen according to the following equation : out in rms out(max) in out v v i = i 1 vv ? c in and c out selection the input capacitance, c in, is needed to filter the trapezoidal current at the source of the high side mosfet. to prevent large ripple current, a low esr input capacitor sized for the maximum rms current should be used. the approximate rms current equation is given : table 2. suggested inductors for typical application circuit component supplier series dimensions (mm) tdk vlf10045 10 x 9.7 x 4.5 tdk slf12565 12.5 x 12.5 x 6.5 taiyo yuden nr8040 8 x 8 x 4 out out l(max) in(max) vv l = 1 fi v ??? ? ? ??? ? ??? ? the inductor's current rating (caused a 40 c temperature rising from 25 c ambient) should be greater than the maximum load current and its saturation current should be greater than the short circuit peak current limit. please see table 2 for the inductor selection reference. this formula has a maximum at v in = 2v out , where i rms = i out / 2. this simple worst case condition is commonly used for design because even significant deviations do not offer much relief. choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. for the input capacitor, two 10 f low esr ceramic capacitors are suggested. for the suggested capacitor, please refer to table 3 for more details. the selection of c out is determined by the required esr to minimize voltage ripple. moreover, the amount of bulk capacitance is also a key for c out selection to ensure that the control loop is stable. loop stability can be checked by viewing the load transient response as described in a later section. the output ripple, v out , is determined by : over temperature protection the rt7272a features an over temperature protection (otp) circuitry to prevent from overheating due to excessive power dissipation. the otp will shut down switching operation when junction temperature exceeds 150 c. once the junction temperature cools down by approximately 20 c, the converter will resume operation. to maintain continuous operation, the maximum junction temperature should be lower than 125 c. inductor selection the inductor value and operating frequency determine the ripple current according to a specific input and output voltage. the ripple current i l increases with higher v in and decreases with higher inductance. out l out 1 viesr 8fc ?? ?? + ?? ?? figure 5. hiccup mode under voltage protection time (50ms/div) hiccup mode v out (2v/div) i lx (2a/div) i out = short
rt7272a 11 ds7272a-01 january 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? the output ripple will be the highest at the maximum input voltage since i l increases with input voltage. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirement. higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in large enough to damage the part. thermal considerations for continuous operation, do not exceed the maximum operation junction temperature 125 c. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum operation junction temperature , t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating conditions specification of rt7272a, the maximum junction temperature is 125 c. the junction to ambient thermal resistance ja is layout dependent. for sop-8 (exposed pad) package, the thermal resistance ja is 75 c/w on the standard jedec 51-7 four-layers thermal test board. the maximum power dissipation at t a = 25 c can be calculated by following formula : p d(max) = (125 c ? 25 c) / (75 c/w) = 1.333w (min.copper area pcb layout) p d(max) = (125 c ? 25 c) / (49 c/w) = 2.04w (70mm 2 copper area pcb layout) the thermal resistance ja of sop-8 (exposed pad) is determined by the package architecture design and the pcb layout design. however, the package architecture design had been designed. if possible, it's useful to increase thermal performance by the pcb layout copper design. the thermal resistance ja can be decreased by adding copper area under the exposed pad of sop-8 (exposed pad) package. as shown in figure 6, the amount of copper area to which the sop-8 (exposed pad) is mounted affects thermal performance. when mounted to the standard sop-8 (exposed pad) pad (figure 6.a), ja is 75 c/w. adding copper area of pad under the sop-8 (exposed pad) (figure 6.b) reduces the ja to 64 c/w. even further, increasing the copper area of pad to 70mm 2 (figure 6.e) reduces the ja to 49 c/w. the maximum power dissipation depends on operating ambient temperature for fixed t j(max) and thermal resistance ja . the figure 7 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. figure 7. derating curve of maximum power dissipation 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 0 25 50 75 100 125 ambient temperature (c) power dissipation (w) copper area 70mm 2 50mm 2 30mm 2 10mm 2 min.layout four-layer pcb
rt7272a 12 ds7272a-01 january 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? (a) copper area = (2.3 x 2.3) mm 2 , ja = 75 c/w (b) copper area = 10mm 2 , ja = 64 c/w (c) copper area = 30mm 2 , ja = 54 c/w (d) copper area = 50mm 2 , ja = 51 c/w (e) copper area = 70mm 2 , ja = 49 c/w figure 6. thermal resistance vs. copper area layout design layout considerations for best performance of the rt7272a, the following layout guidelines must be strictly followed. ` input capacitor must be placed as close to the ic as possible. ` sw should be connected to inductor by wide and short trace. keep sensitive components away from this trace. ` the r l resistor, compensator and feedback components must be connected as close to the device as possible.
rt7272a 13 ds7272a-01 january 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? figure 8. pcb layout guide table 3. suggested capacitors for c in and c out location component supplier part no. capacitance ( f) case size c in murata grm32er71h475k 4.7 1206 c in taiyo yuden UMK325BJ475MM-t 4.7 1206 c in murata grm31cr61e106k 10 1206 c in tdk c3225x5r1e106k 10 1206 c in taiyo yuden tmk316bj106ml 10 1206 c out murata grm31cr60j476m 47 1206 c out tdk c3225x5r0j476m 47 1210 c out murata grm32er71c226m 22 1210 c out tdk c3225x5r1c22m 22 1210 v out sw boot en gnd vin rlim fb comp gnd 2 3 4 5 6 7 8 9 c in c out c s * r s * c boot l v out v in c c r c c p r l r1 r2 v in gnd the compensator and feedback components must be connected as close to the device as possible. input capacitor must be placed as close to the ic as possible. sw should be connected to inductor by wide and short trace. keep sensitive components away from this trace and c boot . the r en component must be connected. the r l resistor must be connected as close to the device as possible. keep sensitive components away. r en * : option
rt7272a 14 ds7272a-01 january 2013 www.richtek.com richtek technology corporation 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. outline dimension a b j f h m c d i y x exposed thermal pad (bottom of package) 8-lead sop (exposed pad) plastic package dimensions in millimeters dimensions in inches symbol min max min max a 4.801 5.004 0.189 0.197 b 3.810 4.000 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.510 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.170 0.254 0.007 0.010 i 0.000 0.152 0.000 0.006 j 5.791 6.200 0.228 0.244 m 0.406 1.270 0.016 0.050 x 2.000 2.300 0.079 0.091 option 1 y 2.000 2.300 0.079 0.091 x 2.100 2.500 0.083 0.098 option 2 y 3.000 3.500 0.118 0.138

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